MCV offers the full flexibility of the Altera Cyclone V SoC FPGA family.  It integrates an ARM-based hard processor system (HPS) consisting of processor, peripherals, and memory interfaces with the FPGA fabric using a high-bandwidth interconnect backbone. The Altera SoCs combine the performance and power savings of hard intellectual property (IP) with the flexibility of programmable logic.

MCV features additional hard logic such as PCI Express® Gen1, multiport memory controllers, and high-speed serial transceivers. Our SoCs drive down power and cost while enabling performance levels required by cost-sensitive applications.

Due to the flexibility of the MCV concept  25KLE, 40KLE, 85KLE and 110KLE SoC FPGAs are supported by MCV.


MCV- versatile usability at its best

MCV is of course one of the most flexible System on Module in the embedded market. Thanks to the combination of the Dual Cortex A9 HPS with the FPGA part most application can be addressed with this approach:

MCV combines FPGA and CPU

MCV connects the world of FPGA projects with common CPU architecture hardware. A's service is to provide a flawless integration of both areas so that users can focus on the development of application software and/or dedicated FPGA-IP

High Flexibility

Maximum flexibility for using the SoM  with 'exotic' interface requirements. Combining standard IP cores like i.e. display-controller, Ethernet, CAN, serial, I²C, SPI, etc, unique SoM configurations can be used. Benefit from the variety of freely available IP-cores by Altera, or, create your own.

Plug and Play

The SoM supports mainline software for U-Boot and Linux. The BSP covers the entire HPS part of the SoC FPGA. A supplies software development services for drivers, bootloaders and their integration for MCV.
Your SoC FPGA projects starts in a few minutes

Robust and Reliable

High-quality connector suitable for high frequency signals and applications in harsh environments. Use a well designed System on Module with sufficient ressources in terms of performance, interfaces and memory